SLTIU - RISC-V instruction reference

sltiuSet less than immediate unsigned 
Sets t1 to 1 if t2 is less than a sign-extended 12-bit immediate as unsigned, otherwise to 0.
RISC-V manual: sltiu 
Forms  sltiu , ,   
Operands t1 Any integer register, x0 to x31, or its named alias, such as zero, t0 or t6. 
t2 An integer register. It may be the same register as t1. 
imm12 A signed 12-bit immediate, -2048 to 2047. 
 .text
li t0, 1
# t0=1 is below the sign-extended all-ones immediate when compared unsigned; sltiu writes 1 to t2.
sltiu t2, t0, -1