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lhu

Load halfword unsigned

Loads the 16-bit halfword at the address in t2 plus an offset into t1, zero-extended to the register width.

RISC-V manual: lhu

Used in

Forms

  • lhu , ()

Pseudo-instructions

The assembler turns these into one or more real instructions.

  • Load from Address

Operands

t1
Any integer register, x0 to x31, or its named alias, such as zero, t0 or t6.
imm12
A signed 12-bit immediate, -2048 to 2047.
t2
An integer register. It may be the same register as t1.
imm
An immediate value: a signed 12-bit value (-2048 to 2047) or a 32-bit value (-2147483648 to 4294967295). The assembler chooses a supported encoding for the value and other operands; a pseudoinstruction may expand into several instructions.
label
A named address in the program, such as the start of a loop or a variable in .data. 
# value is initialized and naturally aligned for this operation.
.data
value: .word 0x017fff80
.text
la t0, value
# The first halfword is 0xFF80; lhu writes 65408 to t2.
lhu t2, 0(t0)