CSRSI - RISC-V instruction reference

csrsiSet bits in CSR immediate Pseudo-instruction
Sets the CSR bits that are set in a 5-bit constant, leaving the other bits unchanged.
RISC-V manual: csrrsi 
Used in When an instruction cannot be carried outRISC-V assembly
 
Forms  csrsi ,   
Operands csr A control and status register, written by name or number, such as fcsr, fflags, frm, cycle, time, instret, ustatus, uepc, ucause or utval. See the supported registers. 
imm12 A signed 12-bit immediate, -2048 to 2047. 
 # Initialize fcsr to 0; csrsi uses immediate 1 and leaves fcsr=1.
.text
li t3, 0
csrw t3, fcsr
csrsi fcsr, 1
csrr t2, fcsr