fence
Memory fence
Makes memory and I/O accesses before the fence take effect before those after it, as other threads see them.
Forms
fence ,
Operands
imm5- An unsigned 5-bit immediate,
0to31, used for values such as a shift count or a CSR immediate.
# Store 42, order reads and writes before reads and writes, then load 42 back. This single-threaded emulator cannot show ordering between harts.
.data
value: .word 0
.text
la t0, value
li t1, 42
sw t1, 0(t0)
fence 3, 3
lw t2, 0(t0)