lwu

Load word unsigned RV64 only

Loads the 32-bit word at the address in t2 plus an offset into t1, zero-extended to 64 bits (RV64 only).

RISC-V manual: lwu

Used in

Forms

  • lwu , ()

Pseudo-instructions

The assembler turns these into one or more real instructions.

  • Load from Address

Operands

t1
Any integer register, x0 to x31, or its named alias, such as zero, t0 or t6.
imm12
A signed 12-bit immediate, -2048 to 2047.
t2
An integer register. It may be the same register as t1.
label
A named address in the program, such as the start of a loop or a variable in .data.

This example runs on RV64.

# value is initialized and naturally aligned for this operation.
.data
value: .word 0x817fff80
.text
la t0, value
# The word 0x817FFF80 zero-extends to RV64; lwu writes 2172649344 (0x817FFF80) to t2.
lwu t2, 0(t0)