csrwi

Write CSR immediate Pseudo-instruction

Writes a 5-bit constant into the CSR and discards the value it held before.

RISC-V manual: csrrwi

Forms

Operands

csr
A control and status register, written by name or number, such as fcsr, fflags, frm, cycle, time, instret, ustatus, uepc, ucause or utval. See the supported registers.
imm12
A signed 12-bit immediate, -2048 to 2047.
# Initialize fcsr to 0; csrwi uses immediate 1 and leaves fcsr=1.
.text
li t3, 0
csrw t3, fcsr
csrwi fcsr, 1
csrr t2, fcsr