Z80 Complete Documentation
Instructions
adc adc r,r' | adc r | adc r,(rr) | adc (rr) | adc r,nn | adc nn | adc r,(ii+dd) | adc (ii+dd) | adc rr,rr'
Adds B and the carry flag to A.
Adds C and the carry flag to A.
Adds D and the carry flag to A.
Adds E and the carry flag to A.
Adds H and the carry flag to A.
Adds L and the carry flag to A.
Adds (HL) and the carry flag to A.
Adds A and the carry flag to A.
Adds nn and the carry flag to A.
Adds IXH and the carry flag to A.
Adds IXL and the carry flag to A.
Adds the value pointed to by IX plus dd and the carry flag to A.
Adds BC and the carry flag to HL.
Adds DE and the carry flag to HL.
Adds HL and the carry flag to HL.
Adds SP and the carry flag to HL.
Adds IYH and the carry flag to A.
Adds IYL and the carry flag to A.
Adds the value pointed to by IY plus dd and the carry flag to A.
add add rr,rr' | add r,r' | add r | add r,(rr) | add (rr) | add r,nn | add nn | add r,(ii+dd) | add (ii+dd)
The value of BC is added to HL.
The value of DE is added to HL.
The value of HL is added to HL.
The value of SP is added to HL.
Adds B to A.
Adds C to A.
Adds D to A.
Adds E to A.
Adds H to A.
Adds L to A.
Adds (HL) to A.
Adds A to A.
Adds nn to A.
The value of BC is added to IX.
The value of DE is added to IX.
The value of IX is added to IX.
The value of SP is added to IX.
Adds IXH to A.
Adds IXL to A.
Adds the value pointed to by IX plus dd to A.
The value of BC is added to IY.
The value of DE is added to IY.
The value of IY is added to IY.
The value of SP is added to IY.
Adds IYH to A.
Adds IYL to A.
Adds the value pointed to by IY plus dd to A.
and and r | and r,r' | and (rr) | and r,(rr) | and (ii+dd) | and r,(ii+dd) | and nn | and r,nn
Bitwise AND on A with B.
Bitwise AND on A with C.
Bitwise AND on A with D.
Bitwise AND on A with E.
Bitwise AND on A with H.
Bitwise AND on A with L.
Bitwise AND on A with (HL).
Bitwise AND on A with A.
Bitwise AND on A with IXH.
Bitwise AND on A with IXL.
Bitwise AND on A with the value pointed to by IX plus dd.
Bitwise AND on A with nn.
Bitwise AND on A with IYH.
Bitwise AND on A with IYL.
Bitwise AND on A with the value pointed to by IY plus dd.
bit bit bit,r | bit bit,(rr) | bit bit,(ii+dd)
Tests bit 0 of B.
Tests bit 0 of C.
Tests bit 0 of D.
Tests bit 0 of E.
Tests bit 0 of H.
Tests bit 0 of L.
Tests bit 0 of (HL).
Tests bit 0 of A.
Tests bit 1 of B.
Tests bit 1 of C.
Tests bit 1 of D.
Tests bit 1 of E.
Tests bit 1 of H.
Tests bit 1 of L.
Tests bit 1 of (HL).
Tests bit 1 of A.
Tests bit 2 of B.
Tests bit 2 of C.
Tests bit 2 of D.
Tests bit 2 of E.
Tests bit 2 of H.
Tests bit 2 of L.
Tests bit 2 of (HL).
Tests bit 2 of A.
Tests bit 3 of B.
Tests bit 3 of C.
Tests bit 3 of D.
Tests bit 3 of E.
Tests bit 3 of H.
Tests bit 3 of L.
Tests bit 3 of (HL).
Tests bit 3 of A.
Tests bit 4 of B.
Tests bit 4 of C.
Tests bit 4 of D.
Tests bit 4 of E.
Tests bit 4 of H.
Tests bit 4 of L.
Tests bit 4 of (HL).
Tests bit 4 of A.
Tests bit 5 of B.
Tests bit 5 of C.
Tests bit 5 of D.
Tests bit 5 of E.
Tests bit 5 of H.
Tests bit 5 of L.
Tests bit 5 of (HL).
Tests bit 5 of A.
Tests bit 6 of B.
Tests bit 6 of C.
Tests bit 6 of D.
Tests bit 6 of E.
Tests bit 6 of H.
Tests bit 6 of L.
Tests bit 6 of (HL).
Tests bit 6 of A.
Tests bit 7 of B.
Tests bit 7 of C.
Tests bit 7 of D.
Tests bit 7 of E.
Tests bit 7 of H.
Tests bit 7 of L.
Tests bit 7 of (HL).
Tests bit 7 of A.
Tests bit 0 of the memory location pointed to by IX plus dd.
Tests bit 1 of the memory location pointed to by IX plus dd.
Tests bit 2 of the memory location pointed to by IX plus dd.
Tests bit 3 of the memory location pointed to by IX plus dd.
Tests bit 4 of the memory location pointed to by IX plus dd.
Tests bit 5 of the memory location pointed to by IX plus dd.
Tests bit 6 of the memory location pointed to by IX plus dd.
Tests bit 7 of the memory location pointed to by IX plus dd.
Tests bit 0 of the memory location pointed to by IY plus dd.
Tests bit 1 of the memory location pointed to by IY plus dd.
Tests bit 2 of the memory location pointed to by IY plus dd.
Tests bit 3 of the memory location pointed to by IY plus dd.
Tests bit 4 of the memory location pointed to by IY plus dd.
Tests bit 5 of the memory location pointed to by IY plus dd.
Tests bit 6 of the memory location pointed to by IY plus dd.
Tests bit 7 of the memory location pointed to by IY plus dd.
call call cc,nnnn | call nnnn
If the zero flag is unset, the current PC value plus three is pushed onto the stack, then is loaded with nnnn.
If the zero flag is set, the current PC value plus three is pushed onto the stack, then is loaded with nnnn.
The current PC value plus three is pushed onto the stack, then is loaded with nnnn.
If the carry flag is unset, the current PC value plus three is pushed onto the stack, then is loaded with nnnn.
If the carry flag is set, the current PC value plus three is pushed onto the stack, then is loaded with nnnn.
If the parity/overflow flag is unset, the current PC value plus three is pushed onto the stack, then is loaded with nnnn.
If the parity/overflow flag is set, the current PC value plus three is pushed onto the stack, then is loaded with nnnn.
If the sign flag is unset, the current PC value plus three is pushed onto the stack, then is loaded with nnnn.
If the sign flag is set, the current PC value plus three is pushed onto the stack, then is loaded with nnnn.
ccf ccf
Inverts the carry flag.
cp cp r | cp r,r' | cp (rr) | cp r,(rr) | cp (ii+dd) | cp r,(ii+dd) | cp nn | cp r,nn
Subtracts B from A and affects flags according to the result. A is not modified.
Subtracts C from A and affects flags according to the result. A is not modified.
Subtracts D from A and affects flags according to the result. A is not modified.
Subtracts E from A and affects flags according to the result. A is not modified.
Subtracts H from A and affects flags according to the result. A is not modified.
Subtracts L from A and affects flags according to the result. A is not modified.
Subtracts (HL) from A and affects flags according to the result. A is not modified.
Subtracts A from A and affects flags according to the result. A is not modified.
Subtracts IXH from A and affects flags according to the result. A is not modified.
Subtracts IXL from A and affects flags according to the result. A is not modified.
Subtracts the value pointed to by IX plus dd from A and affects flags according to the result. A is not modified.
Subtracts IYH from A and affects flags according to the result. A is not modified.
Subtracts IYL from A and affects flags according to the result. A is not modified.
Subtracts the value pointed to by IY plus dd from A and affects flags according to the result. A is not modified.
Subtracts nn from A and affects flags according to the result. A is not modified.
cpd cpd
Compares the value of the memory location pointed to by HL with A. Then HL and BC are decremented. p/v is reset if BC becomes zero and set otherwise.
cpdr cpdr
Compares the value of the memory location pointed to by HL with A. Then HL and BC are decremented. If BC is not zero and z is not set, this operation is repeated. p/v is reset if BC becomes zero and set otherwise, acting as an indicator that HL reached a memory location whose value equalled A before the counter went to zero. Interrupts can trigger while this instruction is processing.
cpi cpi
Compares the value of the memory location pointed to by HL with A. Then HL is incremented and BC is decremented. p/v is reset if BC becomes zero and set otherwise.
cpir cpir
Compares the value of the memory location pointed to by HL with A. Then HL is incremented and BC is decremented. If BC is not zero and z is not set, this operation is repeated. p/v is reset if BC becomes zero and set otherwise, acting as an indicator that HL reached a memory location whose value equalled A before the counter went to zero. Interrupts can trigger while this instruction is processing.
cpl cpl
The contents of A are inverted (one's complement).
daa daa
Adjusts A for BCD addition and subtraction operations.
dec dec r | dec rr | dec (rr) | dec (ii+dd)
Subtracts one from B.
Subtracts one from BC.
Subtracts one from C.
Subtracts one from D.
Subtracts one from DE.
Subtracts one from E.
Subtracts one from H.
Subtracts one from HL.
Subtracts one from L.
Subtracts one from (HL).
Subtracts one from SP.
Subtracts one from A.
Subtracts one from IXH.
Subtracts one from IX.
Subtracts one from IXL.
Subtracts one from the memory location pointed to by IX plus dd.
Subtracts one from IYH.
Subtracts one from IY.
Subtracts one from IYL.
Subtracts one from the memory location pointed to by IY plus dd.
di di
Resets both interrupt flip-flops, thus preventing maskable interrupts from triggering.
djnz djnz offset
The B register is decremented, and if not zero, the signed value offset is added to PC. The jump is measured from the start of the instruction opcode.
ei ei
Sets both interrupt flip-flops, thus allowing maskable interrupts to occur. An interrupt will not occur until after the immediately following instruction.
ex ex rr,rr' | ex (rr),rr | ex rr,(rr)
Exchanges the 16-bit contents of AF and AF'.
Exchanges (SP) with IXL, and (SP+1) with IXH.
Exchanges (SP) with L, and (SP+1) with H.
Exchanges the 16-bit contents of DE and HL.
Exchanges (SP) with IYL, and (SP+1) with IYH.
exx exx
Exchanges the 16-bit contents of BC, DE, and HL with BC', DE', and HL'.
halt halt
Suspends CPU operation until an interrupt or reset occurs.
im im 0 | im 1 | im 2
Sets interrupt mode 0.
Sets interrupt mode 1.
Sets interrupt mode 2.
in in r,(nn) | in r,nn | in r,(rr) | in (rr)
A byte from the port whose address is formed by A in the high bits and nn in the low bits is written to A.
A byte from the port at the 16-bit address contained in the BC register pair is written to B.
A byte from the port at the 16-bit address contained in the BC register pair is written to C.
A byte from the port at the 16-bit address contained in the BC register pair is written to D.
A byte from the port at the 16-bit address contained in the BC register pair is written to E.
A byte from the port at the 16-bit address contained in the BC register pair is written to H.
A byte from the port at the 16-bit address contained in the BC register pair is written to L.
Inputs a byte from the port at the 16-bit address contained in the BC register pair and affects flags only.
A byte from the port at the 16-bit address contained in the BC register pair is written to A.
inc inc rr | inc r | inc (rr) | inc (ii+dd)
Adds one to BC.
Adds one to B.
Adds one to C.
Adds one to DE.
Adds one to D.
Adds one to E.
Adds one to HL.
Adds one to H.
Adds one to L.
Adds one to SP.
Adds one to (HL).
Adds one to A.
Adds one to IX.
Adds one to IXH.
Adds one to IXL.
Adds one to the memory location pointed to by IX plus dd.
Adds one to IY.
Adds one to IYH.
Adds one to IYL.
Adds one to the memory location pointed to by IY plus dd.
ind ind
A byte from the port at the 16-bit address contained in the BC register pair is written to the memory location pointed to by HL. Then HL and B are decremented. Note that the carry flag may be affected, contrary to documentation. Read More
indr indr
A byte from the port at the 16-bit address contained in the BC register pair is written to the memory location pointed to by HL. Then HL and B are decremented. If B is not zero, this operation is repeated. Interrupts can trigger while this instruction is processing. Note that the carry flag may be affected, contrary to documentation. Read More
ini ini
A byte from the port at the 16-bit address contained in the BC register pair is written to the memory location pointed to by HL. Then HL is incremented and B is decremented. Note that the carry flag may be affected, contrary to documentation. Read More
inir inir
A byte from the port at the 16-bit address contained in the BC register pair is written to the memory location pointed to by HL. Then HL is incremented and B is decremented. If B is not zero, this operation is repeated. Interrupts can trigger while this instruction is processing. Note that the carry flag may be affected, contrary to documentation. Read More
jp jp cc,nnnn | jp nnnn | jp (rr) | jp rr
If the zero flag is unset, nnnn is copied to PC.
nnnn is copied to PC.
If the zero flag is set, nnnn is copied to PC.
If the carry flag is unset, nnnn is copied to PC.
If the carry flag is set, nnnn is copied to PC.
Loads the value of IX into PC.
If the parity/overflow flag is unset, nnnn is copied to PC.
Loads the value of HL into PC.
If the parity/overflow flag is set, nnnn is copied to PC.
If the sign flag is unset, nnnn is copied to PC.
If the sign flag is set, nnnn is copied to PC.
Loads the value of IY into PC.
jr jr offset | jr cc,offset
The signed value offset is added to PC. The jump is measured from the start of the instruction opcode.
If the zero flag is unset, the signed value offset is added to PC. The jump is measured from the start of the instruction opcode.
If the zero flag is set, the signed value offset is added to PC. The jump is measured from the start of the instruction opcode.
If the carry flag is unset, the signed value offset is added to PC. The jump is measured from the start of the instruction opcode.
If the carry flag is set, the signed value offset is added to PC. The jump is measured from the start of the instruction opcode.
ld ld rr,nnnn | ld (rr),r | ld r,nn | ld r,(rr) | ld (nnnn),rr | ld rr,(nnnn) | ld (nnnn),r | ld (rr),nn | ld r,(nnnn) | ld r,r' | ld rr,rr' | ld rr,(rr) | ld (rr),rr | ld (ii+dd),nn | ld r,(ii+dd) | ld (ii+dd),r | ld i,a | ld r,a | ld a,i | ld a,r
Loads nnnn into BC.
Stores A into the memory location pointed to by BC.
Loads nn into B.
Loads the value pointed to by BC into A.
Loads nn into C.
Loads nnnn into DE.
Stores A into the memory location pointed to by DE.
Loads nn into D.
Loads the value pointed to by DE into A.
Loads nn into E.
Loads nnnn into HL.
Stores HL into the memory location pointed to by nnnn.
Loads nn into H.
Loads the value pointed to by nnnn into HL.
Loads nn into L.
Loads nnnn into SP.
Stores A into the memory location pointed to by nnnn.
Loads nn into (HL).
Loads the value pointed to by nnnn into A.
Loads nn into A.
The contents of B are loaded into B.
The contents of C are loaded into B.
The contents of D are loaded into B.
The contents of E are loaded into B.
The contents of H are loaded into B.
The contents of HL are loaded into BC.
The contents of L are loaded into B.
The contents of (HL) are loaded into B.
The contents of A are loaded into B.
The contents of B are loaded into C.
The contents of C are loaded into C.
The contents of D are loaded into C.
The contents of E are loaded into C.
The contents of H are loaded into C.
The contents of L are loaded into C.
The contents of (HL) are loaded into C.
The contents of (HL) are loaded into BC.
The contents of A are loaded into C.
The contents of B are loaded into D.
The contents of BC are loaded into DE.
The contents of C are loaded into D.
The contents of D are loaded into D.
The contents of E are loaded into D.
The contents of H are loaded into D.
The contents of HL are loaded into DE.
The contents of L are loaded into D.
The contents of (HL) are loaded into D.
The contents of A are loaded into D.
The contents of B are loaded into E.
The contents of C are loaded into E.
The contents of D are loaded into E.
The contents of E are loaded into E.
The contents of H are loaded into E.
The contents of L are loaded into E.
The contents of (HL) are loaded into E.
The contents of A are loaded into E.
The contents of B are loaded into H.
The contents of BC are loaded into HL.
The contents of C are loaded into H.
The contents of D are loaded into H.
The contents of DE are loaded into HL.
The contents of E are loaded into H.
The contents of H are loaded into H.
The contents of L are loaded into H.
The contents of (HL) are loaded into H.
The contents of A are loaded into H.
The contents of B are loaded into L.
The contents of C are loaded into L.
The contents of D are loaded into L.
The contents of E are loaded into L.
The contents of H are loaded into L.
The contents of L are loaded into L.
The contents of (HL) are loaded into L.
The contents of A are loaded into L.
The contents of B are loaded into (HL).
The contents of C are loaded into (HL).
The contents of BC are loaded into (HL).
The contents of D are loaded into (HL).
The contents of E are loaded into (HL).
The contents of DE are loaded into (HL).
The contents of H are loaded into (HL).
The contents of L are loaded into (HL).
The contents of A are loaded into (HL).
The contents of B are loaded into A.
The contents of C are loaded into A.
The contents of D are loaded into A.
The contents of E are loaded into A.
The contents of H are loaded into A.
The contents of L are loaded into A.
The contents of (HL) are loaded into A.
The contents of A are loaded into A.
Loads nnnn into register IX.
Stores IX into the memory location pointed to by nnnn.
Loads nn into IXH.
Loads the value pointed to by nnnn into IX.
Loads nn into IXL.
Stores nn to the memory location pointed to by IX plus dd.
The contents of IXH are loaded into B.
The contents of IXL are loaded into B.
Loads the value pointed to by IX plus dd into B.
The contents of IXH are loaded into C.
The contents of IXL are loaded into C.
Loads the value pointed to by IX plus dd into C.
The contents of IXH are loaded into D.
The contents of IXL are loaded into D.
Loads the value pointed to by IX plus dd into D.
The contents of IXH are loaded into E.
The contents of IXL are loaded into E.
Loads the value pointed to by IX plus dd into E.
The contents of B are loaded into IXH.
The contents of C are loaded into IXH.
The contents of D are loaded into IXH.
The contents of E are loaded into IXH.
The contents of IXH are loaded into IXH.
The contents of IXL are loaded into IXH.
Loads the value pointed to by IX plus dd into H.
The contents of A are loaded into IXH.
The contents of B are loaded into IXL.
The contents of C are loaded into IXL.
The contents of D are loaded into IXL.
The contents of E are loaded into IXL.
The contents of IXH are loaded into IXL.
The contents of IXL are loaded into IXL.
Loads the value pointed to by IX plus dd into L.
The contents of A are loaded into IXL.
Stores B to the memory location pointed to by IX plus dd.
Stores C to the memory location pointed to by IX plus dd.
Stores D to the memory location pointed to by IX plus dd.
Stores E to the memory location pointed to by IX plus dd.
Stores H to the memory location pointed to by IX plus dd.
Stores L to the memory location pointed to by IX plus dd.
Stores A to the memory location pointed to by IX plus dd.
The contents of IXH are loaded into A.
The contents of IXL are loaded into A.
Loads the value pointed to by IX plus dd into A.
Loads the value of IX into SP.
Stores BC into the memory location pointed to by nnnn.
Stores the value of A into register I.
Loads the value pointed to by nnnn into BC.
Stores the value of A into register R.
Stores DE into the memory location pointed to by nnnn.
Stores the value of register I into A.
Loads the value pointed to by nnnn into DE.
Stores the value of register R into A.
Stores SP into the memory location pointed to by nnnn.
Loads the value pointed to by nnnn into SP.
Loads the value of HL into SP.
Loads nnnn into register IY.
Stores IY into the memory location pointed to by nnnn.
Loads nn into IYH.
Loads the value pointed to by nnnn into IY.
Loads nn into IYL.
Stores nn to the memory location pointed to by IY plus dd.
The contents of IYH are loaded into B.
The contents of IYL are loaded into B.
Loads the value pointed to by IY plus dd into B.
The contents of IYH are loaded into C.
The contents of IYL are loaded into C.
Loads the value pointed to by IY plus dd into C.
The contents of IYH are loaded into D.
The contents of IYL are loaded into D.
Loads the value pointed to by IY plus dd into D.
The contents of IYH are loaded into E.
The contents of IYL are loaded into E.
Loads the value pointed to by IY plus dd into E.
The contents of B are loaded into IYH.
The contents of C are loaded into IYH.
The contents of D are loaded into IYH.
The contents of E are loaded into IYH.
The contents of IYH are loaded into IYH.
The contents of IYL are loaded into IYH.
Loads the value pointed to by IY plus dd into H.
The contents of A are loaded into IYH.
The contents of B are loaded into IYL.
The contents of C are loaded into IYL.
The contents of D are loaded into IYL.
The contents of E are loaded into IYL.
The contents of IYH are loaded into IYL.
The contents of IYL are loaded into IYL.
Loads the value pointed to by IY plus dd into L.
The contents of A are loaded into IYL.
Stores B to the memory location pointed to by IY plus dd.
Stores C to the memory location pointed to by IY plus dd.
Stores D to the memory location pointed to by IY plus dd.
Stores E to the memory location pointed to by IY plus dd.
Stores H to the memory location pointed to by IY plus dd.
Stores L to the memory location pointed to by IY plus dd.
Stores A to the memory location pointed to by IY plus dd.
The contents of IYH are loaded into A.
The contents of IYL are loaded into A.
Loads the value pointed to by IY plus dd into A.
Loads the value of IY into SP.
ldd ldd
Transfers a byte of data from the memory location pointed to by HL to the memory location pointed to by DE. Then HL, DE, and BC are decremented. p/v is reset if BC becomes zero and set otherwise.
lddr lddr
Transfers a byte of data from the memory location pointed to by HL to the memory location pointed to by DE. Then HL, DE, and BC are decremented. If BC is not zero, this operation is repeated. Interrupts can trigger while this instruction is processing.
ldi ldi
Transfers a byte of data from the memory location pointed to by HL to the memory location pointed to by DE. Then HL and DE are incremented and BC is decremented. p/v is reset if BC becomes zero and set otherwise.
ldir ldir
Transfers a byte of data from the memory location pointed to by HL to the memory location pointed to by DE. Then HL and DE are incremented and BC is decremented. If BC is not zero, this operation is repeated. Interrupts can trigger while this instruction is processing.
neg neg
The contents of A are negated (two's complement). Operation is the same as subtracting A from zero.
nop nop
No operation is performed.
or or r | or r,r' | or (rr) | or r,(rr) | or (ii+dd) | or r,(ii+dd) | or nn | or r,nn
Bitwise OR on A with B.
Bitwise OR on A with C.
Bitwise OR on A with D.
Bitwise OR on A with E.
Bitwise OR on A with H.
Bitwise OR on A with L.
Bitwise OR on A with (HL).
Bitwise OR on A with A.
Bitwise OR on A with IXH.
Bitwise OR on A with IXL.
Bitwise OR on A with the value pointed to by IX plus dd.
Bitwise OR on A with nn.
Bitwise OR on A with IYH.
Bitwise OR on A with IYL.
Bitwise OR on A with the value pointed to by IY plus dd.
otdr otdr
B is decremented. A byte from the memory location pointed to by HL is written to the port at the 16-bit address contained in the BC register pair. Then HL is decremented. If B is not zero, this operation is repeated. Interrupts can trigger while this instruction is processing. Note that the carry flag may be affected, contrary to documentation. Read More
otir otir
B is decremented. A byte from the memory location pointed to by HL is written to the port at the 16-bit address contained in the BC register pair. Then HL is incremented. If B is not zero, this operation is repeated. Interrupts can trigger while this instruction is processing. Note that the carry flag may be affected, contrary to documentation. Read More
out out (nn),r | out nn,r | out (rr),r | out (rr),0
The value of A is written to the port whose address is formed by A in the high bits and nn in the low bits.
The value of B is written to the port at the 16-bit address contained in the BC register pair.
The value of C is written to the port at the 16-bit address contained in the BC register pair.
The value of D is written to the port at the 16-bit address contained in the BC register pair.
The value of E is written to the port at the 16-bit address contained in the BC register pair.
The value of H is written to the port at the 16-bit address contained in the BC register pair.
The value of L is written to the port at the 16-bit address contained in the BC register pair.
Outputs a zero (on NMOS Z80s) or 255 (on CMOS Z80s) to the port at the 16-bit address contained in the BC register pair. Read More
The value of A is written to the port at the 16-bit address contained in the BC register pair.
outd outd
B is decremented. A byte from the memory location pointed to by HL is written to the port at the 16-bit address contained in the BC register pair. Then HL is decremented. Note that the carry flag may be affected, contrary to documentation. Read More
outi outi
B is decremented. A byte from the memory location pointed to by HL is written to the port at the 16-bit address contained in the BC register pair. Then HL is incremented. Note that the carry flag may be affected, contrary to documentation. Read More
pop pop rr
The memory location pointed to by SP is stored into C and SP is incremented. The memory location pointed to by SP is stored into B and SP is incremented again.
The memory location pointed to by SP is stored into E and SP is incremented. The memory location pointed to by SP is stored into D and SP is incremented again.
The memory location pointed to by SP is stored into IXL and SP is incremented. The memory location pointed to by SP is stored into IXH and SP is incremented again.
The memory location pointed to by SP is stored into L and SP is incremented. The memory location pointed to by SP is stored into H and SP is incremented again.
The memory location pointed to by SP is stored into F and SP is incremented. The memory location pointed to by SP is stored into A and SP is incremented again.
The memory location pointed to by SP is stored into IYL and SP is incremented. The memory location pointed to by SP is stored into IYH and SP is incremented again.
push push rr
SP is decremented and B is stored into the memory location pointed to by SP. SP is decremented again and C is stored into the memory location pointed to by SP.
SP is decremented and D is stored into the memory location pointed to by SP. SP is decremented again and E is stored into the memory location pointed to by SP.
SP is decremented and IXH is stored into the memory location pointed to by SP. SP is decremented again and IXL is stored into the memory location pointed to by SP.
SP is decremented and H is stored into the memory location pointed to by SP. SP is decremented again and L is stored into the memory location pointed to by SP.
SP is decremented and A is stored into the memory location pointed to by SP. SP is decremented again and F is stored into the memory location pointed to by SP.
SP is decremented and IYH is stored into the memory location pointed to by SP. SP is decremented again and IYL is stored into the memory location pointed to by SP.
res res bit,r | res bit,(rr) | res bit,(ii+dd),r | res bit,(ii+dd)
Resets bit 0 of B.
Resets bit 0 of C.
Resets bit 0 of D.
Resets bit 0 of E.
Resets bit 0 of H.
Resets bit 0 of L.
Resets bit 0 of (HL).
Resets bit 0 of A.
Resets bit 1 of B.
Resets bit 1 of C.
Resets bit 1 of D.
Resets bit 1 of E.
Resets bit 1 of H.
Resets bit 1 of L.
Resets bit 1 of (HL).
Resets bit 1 of A.
Resets bit 2 of B.
Resets bit 2 of C.
Resets bit 2 of D.
Resets bit 2 of E.
Resets bit 2 of H.
Resets bit 2 of L.
Resets bit 2 of (HL).
Resets bit 2 of A.
Resets bit 3 of B.
Resets bit 3 of C.
Resets bit 3 of D.
Resets bit 3 of E.
Resets bit 3 of H.
Resets bit 3 of L.
Resets bit 3 of (HL).
Resets bit 3 of A.
Resets bit 4 of B.
Resets bit 4 of C.
Resets bit 4 of D.
Resets bit 4 of E.
Resets bit 4 of H.
Resets bit 4 of L.
Resets bit 4 of (HL).
Resets bit 4 of A.
Resets bit 5 of B.
Resets bit 5 of C.
Resets bit 5 of D.
Resets bit 5 of E.
Resets bit 5 of H.
Resets bit 5 of L.
Resets bit 5 of (HL).
Resets bit 5 of A.
Resets bit 6 of B.
Resets bit 6 of C.
Resets bit 6 of D.
Resets bit 6 of E.
Resets bit 6 of H.
Resets bit 6 of L.
Resets bit 6 of (HL).
Resets bit 6 of A.
Resets bit 7 of B.
Resets bit 7 of C.
Resets bit 7 of D.
Resets bit 7 of E.
Resets bit 7 of H.
Resets bit 7 of L.
Resets bit 7 of (HL).
Resets bit 7 of A.
Resets bit 0 of the memory location pointed to by IX plus dd. The result is then stored in B.
Resets bit 0 of the memory location pointed to by IX plus dd. The result is then stored in C.
Resets bit 0 of the memory location pointed to by IX plus dd. The result is then stored in D.
Resets bit 0 of the memory location pointed to by IX plus dd. The result is then stored in E.
Resets bit 0 of the memory location pointed to by IX plus dd. The result is then stored in H.
Resets bit 0 of the memory location pointed to by IX plus dd. The result is then stored in L.
Resets bit 0 of the memory location pointed to by IX plus dd.
Resets bit 0 of the memory location pointed to by IX plus dd. The result is then stored in A.
Resets bit 1 of the memory location pointed to by IX plus dd. The result is then stored in B.
Resets bit 1 of the memory location pointed to by IX plus dd. The result is then stored in C.
Resets bit 1 of the memory location pointed to by IX plus dd. The result is then stored in D.
Resets bit 1 of the memory location pointed to by IX plus dd. The result is then stored in E.
Resets bit 1 of the memory location pointed to by IX plus dd. The result is then stored in H.
Resets bit 1 of the memory location pointed to by IX plus dd. The result is then stored in L.
Resets bit 1 of the memory location pointed to by IX plus dd.
Resets bit 1 of the memory location pointed to by IX plus dd. The result is then stored in A.
Resets bit 2 of the memory location pointed to by IX plus dd. The result is then stored in B.
Resets bit 2 of the memory location pointed to by IX plus dd. The result is then stored in C.
Resets bit 2 of the memory location pointed to by IX plus dd. The result is then stored in D.
Resets bit 2 of the memory location pointed to by IX plus dd. The result is then stored in E.
Resets bit 2 of the memory location pointed to by IX plus dd. The result is then stored in H.
Resets bit 2 of the memory location pointed to by IX plus dd. The result is then stored in L.
Resets bit 2 of the memory location pointed to by IX plus dd.
Resets bit 2 of the memory location pointed to by IX plus dd. The result is then stored in A.
Resets bit 3 of the memory location pointed to by IX plus dd. The result is then stored in B.
Resets bit 3 of the memory location pointed to by IX plus dd. The result is then stored in C.
Resets bit 3 of the memory location pointed to by IX plus dd. The result is then stored in D.
Resets bit 3 of the memory location pointed to by IX plus dd. The result is then stored in E.
Resets bit 3 of the memory location pointed to by IX plus dd. The result is then stored in H.
Resets bit 3 of the memory location pointed to by IX plus dd. The result is then stored in L.
Resets bit 3 of the memory location pointed to by IX plus dd.
Resets bit 3 of the memory location pointed to by IX plus dd. The result is then stored in A.
Resets bit 4 of the memory location pointed to by IX plus dd. The result is then stored in B.
Resets bit 4 of the memory location pointed to by IX plus dd. The result is then stored in C.
Resets bit 4 of the memory location pointed to by IX plus dd. The result is then stored in D.
Resets bit 4 of the memory location pointed to by IX plus dd. The result is then stored in E.
Resets bit 4 of the memory location pointed to by IX plus dd. The result is then stored in H.
Resets bit 4 of the memory location pointed to by IX plus dd. The result is then stored in L.
Resets bit 4 of the memory location pointed to by IX plus dd.
Resets bit 4 of the memory location pointed to by IX plus dd. The result is then stored in A.
Resets bit 5 of the memory location pointed to by IX plus dd. The result is then stored in B.
Resets bit 5 of the memory location pointed to by IX plus dd. The result is then stored in C.
Resets bit 5 of the memory location pointed to by IX plus dd. The result is then stored in D.
Resets bit 5 of the memory location pointed to by IX plus dd. The result is then stored in E.
Resets bit 5 of the memory location pointed to by IX plus dd. The result is then stored in H.
Resets bit 5 of the memory location pointed to by IX plus dd. The result is then stored in L.
Resets bit 5 of the memory location pointed to by IX plus dd.
Resets bit 5 of the memory location pointed to by IX plus dd. The result is then stored in A.
Resets bit 6 of the memory location pointed to by IX plus dd. The result is then stored in B.
Resets bit 6 of the memory location pointed to by IX plus dd. The result is then stored in C.
Resets bit 6 of the memory location pointed to by IX plus dd. The result is then stored in D.
Resets bit 6 of the memory location pointed to by IX plus dd. The result is then stored in E.
Resets bit 6 of the memory location pointed to by IX plus dd. The result is then stored in H.
Resets bit 6 of the memory location pointed to by IX plus dd. The result is then stored in L.
Resets bit 6 of the memory location pointed to by IX plus dd.
Resets bit 6 of the memory location pointed to by IX plus dd. The result is then stored in A.
Resets bit 7 of the memory location pointed to by IX plus dd. The result is then stored in B.
Resets bit 7 of the memory location pointed to by IX plus dd. The result is then stored in C.
Resets bit 7 of the memory location pointed to by IX plus dd. The result is then stored in D.
Resets bit 7 of the memory location pointed to by IX plus dd. The result is then stored in E.
Resets bit 7 of the memory location pointed to by IX plus dd. The result is then stored in H.
Resets bit 7 of the memory location pointed to by IX plus dd. The result is then stored in L.
Resets bit 7 of the memory location pointed to by IX plus dd.
Resets bit 7 of the memory location pointed to by IX plus dd. The result is then stored in A.
Resets bit 0 of the memory location pointed to by IY plus dd. The result is then stored in B.
Resets bit 0 of the memory location pointed to by IY plus dd. The result is then stored in C.
Resets bit 0 of the memory location pointed to by IY plus dd. The result is then stored in D.
Resets bit 0 of the memory location pointed to by IY plus dd. The result is then stored in E.
Resets bit 0 of the memory location pointed to by IY plus dd. The result is then stored in H.
Resets bit 0 of the memory location pointed to by IY plus dd. The result is then stored in L.
Resets bit 0 of the memory location pointed to by IY plus dd.
Resets bit 0 of the memory location pointed to by IY plus dd. The result is then stored in A.
Resets bit 1 of the memory location pointed to by IY plus dd. The result is then stored in B.
Resets bit 1 of the memory location pointed to by IY plus dd. The result is then stored in C.
Resets bit 1 of the memory location pointed to by IY plus dd. The result is then stored in D.
Resets bit 1 of the memory location pointed to by IY plus dd. The result is then stored in E.
Resets bit 1 of the memory location pointed to by IY plus dd. The result is then stored in H.
Resets bit 1 of the memory location pointed to by IY plus dd. The result is then stored in L.
Resets bit 1 of the memory location pointed to by IY plus dd.
Resets bit 1 of the memory location pointed to by IY plus dd. The result is then stored in A.
Resets bit 2 of the memory location pointed to by IY plus dd. The result is then stored in B.
Resets bit 2 of the memory location pointed to by IY plus dd. The result is then stored in C.
Resets bit 2 of the memory location pointed to by IY plus dd. The result is then stored in D.
Resets bit 2 of the memory location pointed to by IY plus dd. The result is then stored in E.
Resets bit 2 of the memory location pointed to by IY plus dd. The result is then stored in H.
Resets bit 2 of the memory location pointed to by IY plus dd. The result is then stored in L.
Resets bit 2 of the memory location pointed to by IY plus dd.
Resets bit 2 of the memory location pointed to by IY plus dd. The result is then stored in A.
Resets bit 3 of the memory location pointed to by IY plus dd. The result is then stored in B.
Resets bit 3 of the memory location pointed to by IY plus dd. The result is then stored in C.
Resets bit 3 of the memory location pointed to by IY plus dd. The result is then stored in D.
Resets bit 3 of the memory location pointed to by IY plus dd. The result is then stored in E.
Resets bit 3 of the memory location pointed to by IY plus dd. The result is then stored in H.
Resets bit 3 of the memory location pointed to by IY plus dd. The result is then stored in L.
Resets bit 3 of the memory location pointed to by IY plus dd.
Resets bit 3 of the memory location pointed to by IY plus dd. The result is then stored in A.
Resets bit 4 of the memory location pointed to by IY plus dd. The result is then stored in B.
Resets bit 4 of the memory location pointed to by IY plus dd. The result is then stored in C.
Resets bit 4 of the memory location pointed to by IY plus dd. The result is then stored in D.
Resets bit 4 of the memory location pointed to by IY plus dd. The result is then stored in E.
Resets bit 4 of the memory location pointed to by IY plus dd. The result is then stored in H.
Resets bit 4 of the memory location pointed to by IY plus dd. The result is then stored in L.
Resets bit 4 of the memory location pointed to by IY plus dd.
Resets bit 4 of the memory location pointed to by IY plus dd. The result is then stored in A.
Resets bit 5 of the memory location pointed to by IY plus dd. The result is then stored in B.
Resets bit 5 of the memory location pointed to by IY plus dd. The result is then stored in C.
Resets bit 5 of the memory location pointed to by IY plus dd. The result is then stored in D.
Resets bit 5 of the memory location pointed to by IY plus dd. The result is then stored in E.
Resets bit 5 of the memory location pointed to by IY plus dd. The result is then stored in H.
Resets bit 5 of the memory location pointed to by IY plus dd. The result is then stored in L.
Resets bit 5 of the memory location pointed to by IY plus dd.
Resets bit 5 of the memory location pointed to by IY plus dd. The result is then stored in A.
Resets bit 6 of the memory location pointed to by IY plus dd. The result is then stored in B.
Resets bit 6 of the memory location pointed to by IY plus dd. The result is then stored in C.
Resets bit 6 of the memory location pointed to by IY plus dd. The result is then stored in D.
Resets bit 6 of the memory location pointed to by IY plus dd. The result is then stored in E.
Resets bit 6 of the memory location pointed to by IY plus dd. The result is then stored in H.
Resets bit 6 of the memory location pointed to by IY plus dd. The result is then stored in L.
Resets bit 6 of the memory location pointed to by IY plus dd.
Resets bit 6 of the memory location pointed to by IY plus dd. The result is then stored in A.
Resets bit 7 of the memory location pointed to by IY plus dd. The result is then stored in B.
Resets bit 7 of the memory location pointed to by IY plus dd. The result is then stored in C.
Resets bit 7 of the memory location pointed to by IY plus dd. The result is then stored in D.
Resets bit 7 of the memory location pointed to by IY plus dd. The result is then stored in E.
Resets bit 7 of the memory location pointed to by IY plus dd. The result is then stored in H.
Resets bit 7 of the memory location pointed to by IY plus dd. The result is then stored in L.
Resets bit 7 of the memory location pointed to by IY plus dd.
Resets bit 7 of the memory location pointed to by IY plus dd. The result is then stored in A.
ret ret cc | ret
If the zero flag is unset, the top stack entry is popped into PC.
If the zero flag is set, the top stack entry is popped into PC.
The top stack entry is popped into PC.
If the carry flag is unset, the top stack entry is popped into PC.
If the carry flag is set, the top stack entry is popped into PC.
If the parity/overflow flag is unset, the top stack entry is popped into PC.
If the parity/overflow flag is set, the top stack entry is popped into PC.
If the sign flag is unset, the top stack entry is popped into PC.
If the sign flag is set, the top stack entry is popped into PC.
reti reti
Used at the end of a maskable interrupt service routine. The top stack entry is popped into PC, and signals an I/O device that the interrupt has finished, allowing nested interrupts (not a consideration on the TI).
retn retn
Used at the end of a non-maskable interrupt service routine (located at 0066h) to pop the top stack entry into PC. The value of IFF2 is copied to IFF1 so that maskable interrupts are allowed to continue as before. NMIs are not enabled on the TI.
rl rl r | rl (rr) | rl (ii+dd),r | rl (ii+dd)
The contents of B are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0.
The contents of C are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0.
The contents of D are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0.
The contents of E are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0.
The contents of H are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0.
The contents of L are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0.
The contents of (HL) are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0.
The contents of A are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0.
The contents of the memory location pointed to by IX plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0. The result is then stored in B.
The contents of the memory location pointed to by IX plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0. The result is then stored in C.
The contents of the memory location pointed to by IX plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0. The result is then stored in D.
The contents of the memory location pointed to by IX plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0. The result is then stored in E.
The contents of the memory location pointed to by IX plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0. The result is then stored in H.
The contents of the memory location pointed to by IX plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0. The result is then stored in L.
The contents of the memory location pointed to by IX plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0.
The contents of the memory location pointed to by IX plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0. The result is then stored in A.
The contents of the memory location pointed to by IY plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0. The result is then stored in B.
The contents of the memory location pointed to by IY plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0. The result is then stored in C.
The contents of the memory location pointed to by IY plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0. The result is then stored in D.
The contents of the memory location pointed to by IY plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0. The result is then stored in E.
The contents of the memory location pointed to by IY plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0. The result is then stored in H.
The contents of the memory location pointed to by IY plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0. The result is then stored in L.
The contents of the memory location pointed to by IY plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0.
The contents of the memory location pointed to by IY plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0. The result is then stored in A.
rla rla
The contents of A are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0.
rlc rlc r | rlc (rr) | rlc (ii+dd),r | rlc (ii+dd)
The contents of B are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0.
The contents of C are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0.
The contents of D are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0.
The contents of E are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0.
The contents of H are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0.
The contents of L are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0.
The contents of (HL) are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0.
The contents of A are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0.
The contents of the memory location pointed to by IX plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0. The result is then stored in B.
The contents of the memory location pointed to by IX plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0. The result is then stored in C.
The contents of the memory location pointed to by IX plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0. The result is then stored in D.
The contents of the memory location pointed to by IX plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0. The result is then stored in E.
The contents of the memory location pointed to by IX plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0. The result is then stored in H.
The contents of the memory location pointed to by IX plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0. The result is then stored in L.
The contents of the memory location pointed to by IX plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0.
The contents of the memory location pointed to by IX plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0. The result is then stored in A.
The contents of the memory location pointed to by IY plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0. The result is then stored in B.
The contents of the memory location pointed to by IY plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0. The result is then stored in C.
The contents of the memory location pointed to by IY plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0. The result is then stored in D.
The contents of the memory location pointed to by IY plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0. The result is then stored in E.
The contents of the memory location pointed to by IY plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0. The result is then stored in H.
The contents of the memory location pointed to by IY plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0. The result is then stored in L.
The contents of the memory location pointed to by IY plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0.
The contents of the memory location pointed to by IY plus dd are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0. The result is then stored in A.
rlca rlca
The contents of A are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0.
rld rld
The contents of the low-order nibble of (HL) are copied to the high-order nibble of (HL). The previous contents are copied to the low-order nibble of A. The previous contents are copied to the low-order nibble of (HL).
rr rr r | rr (rr) | rr (ii+dd),r | rr (ii+dd)
The contents of B are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7.
The contents of C are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7.
The contents of D are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7.
The contents of E are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7.
The contents of H are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7.
The contents of L are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7.
The contents of (HL) are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7.
The contents of A are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7.
The contents of the memory location pointed to by IX plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7. The result is then stored in B.
The contents of the memory location pointed to by IX plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7. The result is then stored in C.
The contents of the memory location pointed to by IX plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7. The result is then stored in D.
The contents of the memory location pointed to by IX plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7. The result is then stored in E.
The contents of the memory location pointed to by IX plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7. The result is then stored in H.
The contents of the memory location pointed to by IX plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7. The result is then stored in L.
The contents of the memory location pointed to by IX plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7.
The contents of the memory location pointed to by IX plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7. The result is then stored in A.
The contents of the memory location pointed to by IY plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7. The result is then stored in B.
The contents of the memory location pointed to by IY plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7. The result is then stored in C.
The contents of the memory location pointed to by IY plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7. The result is then stored in D.
The contents of the memory location pointed to by IY plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7. The result is then stored in E.
The contents of the memory location pointed to by IY plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7. The result is then stored in H.
The contents of the memory location pointed to by IY plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7. The result is then stored in L.
The contents of the memory location pointed to by IY plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7.
The contents of the memory location pointed to by IY plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7. The result is then stored in A.
rra rra
The contents of A are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7.
rrc rrc r | rrc (rr) | rrc (ii+dd),r | rrc (ii+dd)
The contents of B are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7.
The contents of C are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7.
The contents of D are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7.
The contents of E are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7.
The contents of H are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7.
The contents of L are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7.
The contents of (HL) are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7.
The contents of A are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7.
The contents of the memory location pointed to by IX plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7. The result is then stored in B.
The contents of the memory location pointed to by IX plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7. The result is then stored in C.
The contents of the memory location pointed to by IX plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7. The result is then stored in D.
The contents of the memory location pointed to by IX plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7. The result is then stored in E.
The contents of the memory location pointed to by IX plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7. The result is then stored in H.
The contents of the memory location pointed to by IX plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7. The result is then stored in L.
The contents of the memory location pointed to by IX plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7.
The contents of the memory location pointed to by IX plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7. The result is then stored in A.
The contents of the memory location pointed to by IY plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7. The result is then stored in B.
The contents of the memory location pointed to by IY plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7. The result is then stored in C.
The contents of the memory location pointed to by IY plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7. The result is then stored in D.
The contents of the memory location pointed to by IY plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7. The result is then stored in E.
The contents of the memory location pointed to by IY plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7. The result is then stored in H.
The contents of the memory location pointed to by IY plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7. The result is then stored in L.
The contents of the memory location pointed to by IY plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7.
The contents of the memory location pointed to by IY plus dd are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7. The result is then stored in A.
rrca rrca
The contents of A are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7.
rrd rrd
The contents of the low-order nibble of (HL) are copied to the low-order nibble of A. The previous contents are copied to the high-order nibble of (HL). The previous contents are copied to the low-order nibble of (HL).
rst rst 00 | rst 08 | rst 10 | rst 18 | rst 20 | rst 28 | rst 30 | rst 38
The current PC value plus one is pushed onto the stack, then is loaded with 0.
The current PC value plus one is pushed onto the stack, then is loaded with 8.
The current PC value plus one is pushed onto the stack, then is loaded with 16.
The current PC value plus one is pushed onto the stack, then is loaded with 24.
The current PC value plus one is pushed onto the stack, then is loaded with 32.
The current PC value plus one is pushed onto the stack, then is loaded with 40.
The current PC value plus one is pushed onto the stack, then is loaded with 48.
The current PC value plus one is pushed onto the stack, then is loaded with 56.
sbc sbc r,r' | sbc r | sbc r,(rr) | sbc (rr) | sbc r,(ii+dd) | sbc (ii+dd) | sbc r,nn | sbc nn | sbc rr,rr'
Subtracts B and the carry flag from A.
Subtracts C and the carry flag from A.
Subtracts D and the carry flag from A.
Subtracts E and the carry flag from A.
Subtracts H and the carry flag from A.
Subtracts L and the carry flag from A.
Subtracts (HL) and the carry flag from A.
Subtracts A and the carry flag from A.
Subtracts IXH and the carry flag from A.
Subtracts IXL and the carry flag from A.
Subtracts the value pointed to by IX plus dd and the carry flag from A.
Subtracts nn and the carry flag from A.
Subtracts BC and the carry flag from HL.
Subtracts DE and the carry flag from HL.
Subtracts HL and the carry flag from HL.
Subtracts SP and the carry flag from HL.
Subtracts IYH and the carry flag from A.
Subtracts IYL and the carry flag from A.
Subtracts the value pointed to by IY plus dd and the carry flag from A.
scf scf
Sets the carry flag.
set set bit,r | set bit,(rr) | set bit,(ii+dd),r | set bit,(ii+dd)
Sets bit 0 of B.
Sets bit 0 of C.
Sets bit 0 of D.
Sets bit 0 of E.
Sets bit 0 of H.
Sets bit 0 of L.
Sets bit 0 of (HL).
Sets bit 0 of A.
Sets bit 1 of B.
Sets bit 1 of C.
Sets bit 1 of D.
Sets bit 1 of E.
Sets bit 1 of H.
Sets bit 1 of L.
Sets bit 1 of (HL).
Sets bit 1 of A.
Sets bit 2 of B.
Sets bit 2 of C.
Sets bit 2 of D.
Sets bit 2 of E.
Sets bit 2 of H.
Sets bit 2 of L.
Sets bit 2 of (HL).
Sets bit 2 of A.
Sets bit 3 of B.
Sets bit 3 of C.
Sets bit 3 of D.
Sets bit 3 of E.
Sets bit 3 of H.
Sets bit 3 of L.
Sets bit 3 of (HL).
Sets bit 3 of A.
Sets bit 4 of B.
Sets bit 4 of C.
Sets bit 4 of D.
Sets bit 4 of E.
Sets bit 4 of H.
Sets bit 4 of L.
Sets bit 4 of (HL).
Sets bit 4 of A.
Sets bit 5 of B.
Sets bit 5 of C.
Sets bit 5 of D.
Sets bit 5 of E.
Sets bit 5 of H.
Sets bit 5 of L.
Sets bit 5 of (HL).
Sets bit 5 of A.
Sets bit 6 of B.
Sets bit 6 of C.
Sets bit 6 of D.
Sets bit 6 of E.
Sets bit 6 of H.
Sets bit 6 of L.
Sets bit 6 of (HL).
Sets bit 6 of A.
Sets bit 7 of B.
Sets bit 7 of C.
Sets bit 7 of D.
Sets bit 7 of E.
Sets bit 7 of H.
Sets bit 7 of L.
Sets bit 7 of (HL).
Sets bit 7 of A.
Sets bit 0 of the memory location pointed to by IX plus dd. The result is then stored in B.
Sets bit 0 of the memory location pointed to by IX plus dd. The result is then stored in C.
Sets bit 0 of the memory location pointed to by IX plus dd. The result is then stored in D.
Sets bit 0 of the memory location pointed to by IX plus dd. The result is then stored in E.
Sets bit 0 of the memory location pointed to by IX plus dd. The result is then stored in H.
Sets bit 0 of the memory location pointed to by IX plus dd. The result is then stored in L.
Sets bit 0 of the memory location pointed to by IX plus dd.
Sets bit 0 of the memory location pointed to by IX plus dd. The result is then stored in A.
Sets bit 1 of the memory location pointed to by IX plus dd. The result is then stored in B.
Sets bit 1 of the memory location pointed to by IX plus dd. The result is then stored in C.
Sets bit 1 of the memory location pointed to by IX plus dd. The result is then stored in D.
Sets bit 1 of the memory location pointed to by IX plus dd. The result is then stored in E.
Sets bit 1 of the memory location pointed to by IX plus dd. The result is then stored in H.
Sets bit 1 of the memory location pointed to by IX plus dd. The result is then stored in L.
Sets bit 1 of the memory location pointed to by IX plus dd.
Sets bit 1 of the memory location pointed to by IX plus dd. The result is then stored in A.
Sets bit 2 of the memory location pointed to by IX plus dd. The result is then stored in B.
Sets bit 2 of the memory location pointed to by IX plus dd. The result is then stored in C.
Sets bit 2 of the memory location pointed to by IX plus dd. The result is then stored in D.
Sets bit 2 of the memory location pointed to by IX plus dd. The result is then stored in E.
Sets bit 2 of the memory location pointed to by IX plus dd. The result is then stored in H.
Sets bit 2 of the memory location pointed to by IX plus dd. The result is then stored in L.
Sets bit 2 of the memory location pointed to by IX plus dd.
Sets bit 2 of the memory location pointed to by IX plus dd. The result is then stored in A.
Sets bit 3 of the memory location pointed to by IX plus dd. The result is then stored in B.
Sets bit 3 of the memory location pointed to by IX plus dd. The result is then stored in C.
Sets bit 3 of the memory location pointed to by IX plus dd. The result is then stored in D.
Sets bit 3 of the memory location pointed to by IX plus dd. The result is then stored in E.
Sets bit 3 of the memory location pointed to by IX plus dd. The result is then stored in H.
Sets bit 3 of the memory location pointed to by IX plus dd. The result is then stored in L.
Sets bit 3 of the memory location pointed to by IX plus dd.
Sets bit 3 of the memory location pointed to by IX plus dd. The result is then stored in A.
Sets bit 4 of the memory location pointed to by IX plus dd. The result is then stored in B.
Sets bit 4 of the memory location pointed to by IX plus dd. The result is then stored in C.
Sets bit 4 of the memory location pointed to by IX plus dd. The result is then stored in D.
Sets bit 4 of the memory location pointed to by IX plus dd. The result is then stored in E.
Sets bit 4 of the memory location pointed to by IX plus dd. The result is then stored in H.
Sets bit 4 of the memory location pointed to by IX plus dd. The result is then stored in L.
Sets bit 4 of the memory location pointed to by IX plus dd.
Sets bit 4 of the memory location pointed to by IX plus dd. The result is then stored in A.
Sets bit 5 of the memory location pointed to by IX plus dd. The result is then stored in B.
Sets bit 5 of the memory location pointed to by IX plus dd. The result is then stored in C.
Sets bit 5 of the memory location pointed to by IX plus dd. The result is then stored in D.
Sets bit 5 of the memory location pointed to by IX plus dd. The result is then stored in E.
Sets bit 5 of the memory location pointed to by IX plus dd. The result is then stored in H.
Sets bit 5 of the memory location pointed to by IX plus dd. The result is then stored in L.
Sets bit 5 of the memory location pointed to by IX plus dd.
Sets bit 5 of the memory location pointed to by IX plus dd. The result is then stored in A.
Sets bit 6 of the memory location pointed to by IX plus dd. The result is then stored in B.
Sets bit 6 of the memory location pointed to by IX plus dd. The result is then stored in C.
Sets bit 6 of the memory location pointed to by IX plus dd. The result is then stored in D.
Sets bit 6 of the memory location pointed to by IX plus dd. The result is then stored in E.
Sets bit 6 of the memory location pointed to by IX plus dd. The result is then stored in H.
Sets bit 6 of the memory location pointed to by IX plus dd. The result is then stored in L.
Sets bit 6 of the memory location pointed to by IX plus dd.
Sets bit 6 of the memory location pointed to by IX plus dd. The result is then stored in A.
Sets bit 7 of the memory location pointed to by IX plus dd. The result is then stored in B.
Sets bit 7 of the memory location pointed to by IX plus dd. The result is then stored in C.
Sets bit 7 of the memory location pointed to by IX plus dd. The result is then stored in D.
Sets bit 7 of the memory location pointed to by IX plus dd. The result is then stored in E.
Sets bit 7 of the memory location pointed to by IX plus dd. The result is then stored in H.
Sets bit 7 of the memory location pointed to by IX plus dd. The result is then stored in L.
Sets bit 7 of the memory location pointed to by IX plus dd.
Sets bit 7 of the memory location pointed to by IX plus dd. The result is then stored in A.
Sets bit 0 of the memory location pointed to by IY plus dd. The result is then stored in B.
Sets bit 0 of the memory location pointed to by IY plus dd. The result is then stored in C.
Sets bit 0 of the memory location pointed to by IY plus dd. The result is then stored in D.
Sets bit 0 of the memory location pointed to by IY plus dd. The result is then stored in E.
Sets bit 0 of the memory location pointed to by IY plus dd. The result is then stored in H.
Sets bit 0 of the memory location pointed to by IY plus dd. The result is then stored in L.
Sets bit 0 of the memory location pointed to by IY plus dd.
Sets bit 0 of the memory location pointed to by IY plus dd. The result is then stored in A.
Sets bit 1 of the memory location pointed to by IY plus dd. The result is then stored in B.
Sets bit 1 of the memory location pointed to by IY plus dd. The result is then stored in C.
Sets bit 1 of the memory location pointed to by IY plus dd. The result is then stored in D.
Sets bit 1 of the memory location pointed to by IY plus dd. The result is then stored in E.
Sets bit 1 of the memory location pointed to by IY plus dd. The result is then stored in H.
Sets bit 1 of the memory location pointed to by IY plus dd. The result is then stored in L.
Sets bit 1 of the memory location pointed to by IY plus dd.
Sets bit 1 of the memory location pointed to by IY plus dd. The result is then stored in A.
Sets bit 2 of the memory location pointed to by IY plus dd. The result is then stored in B.
Sets bit 2 of the memory location pointed to by IY plus dd. The result is then stored in C.
Sets bit 2 of the memory location pointed to by IY plus dd. The result is then stored in D.
Sets bit 2 of the memory location pointed to by IY plus dd. The result is then stored in E.
Sets bit 2 of the memory location pointed to by IY plus dd. The result is then stored in H.
Sets bit 2 of the memory location pointed to by IY plus dd. The result is then stored in L.
Sets bit 2 of the memory location pointed to by IY plus dd.
Sets bit 2 of the memory location pointed to by IY plus dd. The result is then stored in A.
Sets bit 3 of the memory location pointed to by IY plus dd. The result is then stored in B.
Sets bit 3 of the memory location pointed to by IY plus dd. The result is then stored in C.
Sets bit 3 of the memory location pointed to by IY plus dd. The result is then stored in D.
Sets bit 3 of the memory location pointed to by IY plus dd. The result is then stored in E.
Sets bit 3 of the memory location pointed to by IY plus dd. The result is then stored in H.
Sets bit 3 of the memory location pointed to by IY plus dd. The result is then stored in L.
Sets bit 3 of the memory location pointed to by IY plus dd.
Sets bit 3 of the memory location pointed to by IY plus dd. The result is then stored in A.
Sets bit 4 of the memory location pointed to by IY plus dd. The result is then stored in B.
Sets bit 4 of the memory location pointed to by IY plus dd. The result is then stored in C.
Sets bit 4 of the memory location pointed to by IY plus dd. The result is then stored in D.
Sets bit 4 of the memory location pointed to by IY plus dd. The result is then stored in E.
Sets bit 4 of the memory location pointed to by IY plus dd. The result is then stored in H.
Sets bit 4 of the memory location pointed to by IY plus dd. The result is then stored in L.
Sets bit 4 of the memory location pointed to by IY plus dd.
Sets bit 4 of the memory location pointed to by IY plus dd. The result is then stored in A.
Sets bit 5 of the memory location pointed to by IY plus dd. The result is then stored in B.
Sets bit 5 of the memory location pointed to by IY plus dd. The result is then stored in C.
Sets bit 5 of the memory location pointed to by IY plus dd. The result is then stored in D.
Sets bit 5 of the memory location pointed to by IY plus dd. The result is then stored in E.
Sets bit 5 of the memory location pointed to by IY plus dd. The result is then stored in H.
Sets bit 5 of the memory location pointed to by IY plus dd. The result is then stored in L.
Sets bit 5 of the memory location pointed to by IY plus dd.
Sets bit 5 of the memory location pointed to by IY plus dd. The result is then stored in A.
Sets bit 6 of the memory location pointed to by IY plus dd. The result is then stored in B.
Sets bit 6 of the memory location pointed to by IY plus dd. The result is then stored in C.
Sets bit 6 of the memory location pointed to by IY plus dd. The result is then stored in D.
Sets bit 6 of the memory location pointed to by IY plus dd. The result is then stored in E.
Sets bit 6 of the memory location pointed to by IY plus dd. The result is then stored in H.
Sets bit 6 of the memory location pointed to by IY plus dd. The result is then stored in L.
Sets bit 6 of the memory location pointed to by IY plus dd.
Sets bit 6 of the memory location pointed to by IY plus dd. The result is then stored in A.
Sets bit 7 of the memory location pointed to by IY plus dd. The result is then stored in B.
Sets bit 7 of the memory location pointed to by IY plus dd. The result is then stored in C.
Sets bit 7 of the memory location pointed to by IY plus dd. The result is then stored in D.
Sets bit 7 of the memory location pointed to by IY plus dd. The result is then stored in E.
Sets bit 7 of the memory location pointed to by IY plus dd. The result is then stored in H.
Sets bit 7 of the memory location pointed to by IY plus dd. The result is then stored in L.
Sets bit 7 of the memory location pointed to by IY plus dd.
Sets bit 7 of the memory location pointed to by IY plus dd. The result is then stored in A.
sla sla r | sla (rr) | sla (ii+dd),r | sla (ii+dd)
The contents of B are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0.
The contents of C are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0.
The contents of D are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0.
The contents of E are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0.
The contents of H are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0.
The contents of L are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0.
The contents of (HL) are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0.
The contents of A are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0.
The contents of the memory location pointed to by IX plus dd are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0. The result is then stored in B.
The contents of the memory location pointed to by IX plus dd are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0. The result is then stored in C.
The contents of the memory location pointed to by IX plus dd are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0. The result is then stored in D.
The contents of the memory location pointed to by IX plus dd are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0. The result is then stored in E.
The contents of the memory location pointed to by IX plus dd are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0. The result is then stored in H.
The contents of the memory location pointed to by IX plus dd are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0. The result is then stored in L.
The contents of the memory location pointed to by IX plus dd are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0.
The contents of the memory location pointed to by IX plus dd are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0. The result is then stored in A.
The contents of the memory location pointed to by IY plus dd are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0. The result is then stored in B.
The contents of the memory location pointed to by IY plus dd are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0. The result is then stored in C.
The contents of the memory location pointed to by IY plus dd are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0. The result is then stored in D.
The contents of the memory location pointed to by IY plus dd are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0. The result is then stored in E.
The contents of the memory location pointed to by IY plus dd are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0. The result is then stored in H.
The contents of the memory location pointed to by IY plus dd are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0. The result is then stored in L.
The contents of the memory location pointed to by IY plus dd are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0.
The contents of the memory location pointed to by IY plus dd are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0. The result is then stored in A.
sll sll r | sll (rr) | sll (ii+dd),r | sll (ii+dd)
The contents of B are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0.
The contents of C are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0.
The contents of D are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0.
The contents of E are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0.
The contents of H are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0.
The contents of L are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0.
The contents of (HL) are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0.
The contents of A are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0.
The contents of the memory location pointed to by IX plus dd are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0. The result is then stored in B.
The contents of the memory location pointed to by IX plus dd are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0. The result is then stored in C.
The contents of the memory location pointed to by IX plus dd are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0. The result is then stored in D.
The contents of the memory location pointed to by IX plus dd are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0. The result is then stored in E.
The contents of the memory location pointed to by IX plus dd are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0. The result is then stored in H.
The contents of the memory location pointed to by IX plus dd are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0. The result is then stored in L.
The contents of the memory location pointed to by IX plus dd are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0.
The contents of the memory location pointed to by IX plus dd are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0. The result is then stored in A.
The contents of the memory location pointed to by IY plus dd are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0. The result is then stored in B.
The contents of the memory location pointed to by IY plus dd are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0. The result is then stored in C.
The contents of the memory location pointed to by IY plus dd are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0. The result is then stored in D.
The contents of the memory location pointed to by IY plus dd are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0. The result is then stored in E.
The contents of the memory location pointed to by IY plus dd are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0. The result is then stored in H.
The contents of the memory location pointed to by IY plus dd are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0. The result is then stored in L.
The contents of the memory location pointed to by IY plus dd are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0.
The contents of the memory location pointed to by IY plus dd are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0. The result is then stored in A.
sra sra r | sra (rr) | sra (ii+dd),r | sra (ii+dd)
The contents of B are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged.
The contents of C are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged.
The contents of D are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged.
The contents of E are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged.
The contents of H are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged.
The contents of L are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged.
The contents of (HL) are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged.
The contents of A are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged.
The contents of the memory location pointed to by IX plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged. The result is then stored in B.
The contents of the memory location pointed to by IX plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged. The result is then stored in C.
The contents of the memory location pointed to by IX plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged. The result is then stored in D.
The contents of the memory location pointed to by IX plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged. The result is then stored in E.
The contents of the memory location pointed to by IX plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged. The result is then stored in H.
The contents of the memory location pointed to by IX plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged. The result is then stored in L.
The contents of the memory location pointed to by IX plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged.
The contents of the memory location pointed to by IX plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged. The result is then stored in A.
The contents of the memory location pointed to by IY plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged. The result is then stored in B.
The contents of the memory location pointed to by IY plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged. The result is then stored in C.
The contents of the memory location pointed to by IY plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged. The result is then stored in D.
The contents of the memory location pointed to by IY plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged. The result is then stored in E.
The contents of the memory location pointed to by IY plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged. The result is then stored in H.
The contents of the memory location pointed to by IY plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged. The result is then stored in L.
The contents of the memory location pointed to by IY plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged.
The contents of the memory location pointed to by IY plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged. The result is then stored in A.
srl srl r | srl (rr) | srl (ii+dd),r | srl (ii+dd)
The contents of B are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7.
The contents of C are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7.
The contents of D are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7.
The contents of E are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7.
The contents of H are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7.
The contents of L are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7.
The contents of (HL) are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7.
The contents of A are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7.
The contents of the memory location pointed to by IX plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7. The result is then stored in B.
The contents of the memory location pointed to by IX plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7. The result is then stored in C.
The contents of the memory location pointed to by IX plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7. The result is then stored in D.
The contents of the memory location pointed to by IX plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7. The result is then stored in E.
The contents of the memory location pointed to by IX plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7. The result is then stored in H.
The contents of the memory location pointed to by IX plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7. The result is then stored in L.
The contents of the memory location pointed to by IX plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7.
The contents of the memory location pointed to by IX plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7. The result is then stored in A.
The contents of the memory location pointed to by IY plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7. The result is then stored in B.
The contents of the memory location pointed to by IY plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7. The result is then stored in C.
The contents of the memory location pointed to by IY plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7. The result is then stored in D.
The contents of the memory location pointed to by IY plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7. The result is then stored in E.
The contents of the memory location pointed to by IY plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7. The result is then stored in H.
The contents of the memory location pointed to by IY plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7. The result is then stored in L.
The contents of the memory location pointed to by IY plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7.
The contents of the memory location pointed to by IY plus dd are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7. The result is then stored in A.
sub sub r | sub r,r' | sub (rr) | sub r,(rr) | sub nn | sub r,nn | sub (ii+dd) | sub r,(ii+dd)
Subtracts B from A.
Subtracts C from A.
Subtracts D from A.
Subtracts E from A.
Subtracts H from A.
Subtracts L from A.
Subtracts (HL) from A.
Subtracts A from A.
Subtracts nn from A.
Subtracts IXH from A.
Subtracts IXL from A.
Subtracts the value pointed to by IX plus dd from A.
Subtracts IYH from A.
Subtracts IYL from A.
Subtracts the value pointed to by IY plus dd from A.
xor xor r | xor r,r' | xor (rr) | xor r,(rr) | xor (ii+dd) | xor r,(ii+dd) | xor nn | xor r,nn
Bitwise XOR on A with B.
Bitwise XOR on A with C.
Bitwise XOR on A with D.
Bitwise XOR on A with E.
Bitwise XOR on A with H.
Bitwise XOR on A with L.
Bitwise XOR on A with (HL).
Bitwise XOR on A with A.
Bitwise XOR on A with IXH.
Bitwise XOR on A with IXL.
Bitwise XOR on A with the value pointed to by IX plus dd.
Bitwise XOR on A with nn.
Bitwise XOR on A with IYH.
Bitwise XOR on A with IYL.
Bitwise XOR on A with the value pointed to by IY plus dd.
Directives
Directives are not executed by the CPU: they tell the assembler where to put the code, what data to emit, which names stand for which values, and when to expand a macro.
.title
Set the title of the program, as a string.
error
Force an error.
defb
Define a sequence of bytes, text, or strings.
defw
Define a sequence of 16-bit words.
.long
Define a sequence of 32-bit longs.
equ
Assign a value to a symbol.
org
Specify address of next instruction.
align
Add fill bytes until address is multiple of specified value.
defs
Fill memory with repeated bytes.
macro
Start a macro definition.
endm
End a macro definition.
if
If conditional.
else
Else conditional.
endif
End of if conditional.
end
End of file, optionally followed by entry address or label.
#target
Specify whether targeting bin or rom.
#code
Start a new code segment.
#include
Include an assembly file or library directory.
#local
Start a local scope.
#endlocal
End a local scope.
#insert
Insert a binary file.
Registers & Flags
Registers
a 8 bit
Accumulator. The destination of every 8 bit arithmetic and logic instruction, and the only register that can be loaded from or stored to a bare address.
f 8 bit
Flags. Holds the sign, zero, half carry, parity/overflow, add/subtract and carry bits; it is read and written only as part of af (push af, pop af, ex af,af').
b 8 bit
General purpose register, and the counter used by djnz, the block instructions (ldir, cpir, …) and the (c) port instructions.
c 8 bit
General purpose register, and the port number used by in r,(c) and out (c),r.
d 8 bit
General purpose register, the high half of de.
e 8 bit
General purpose register, the low half of de.
h 8 bit
General purpose register, the high half of hl.
l 8 bit
General purpose register, the low half of hl.
af 16 bit
The accumulator and the flags as one 16 bit register. Only push, pop and ex af,af' use it as a pair.
bc 16 bit
The b and c registers as a pair. Used as a byte counter by the block instructions and as the port address by the (c) forms.
de 16 bit
The d and e registers as a pair. The destination pointer of the block copy instructions.
hl 16 bit
The h and l registers as a pair. The Z80's main pointer: (hl) can stand in for any 8 bit register operand, and add hl,rr is the only 16 bit addition.
ix 16 bit
Index register. Addressed as (ix+dd) with a signed 8 bit displacement, which costs an extra prefix byte and several clock cycles per access.
iy 16 bit
Index register, identical to ix but with its own prefix.
sp 16 bit
Stack pointer. push decrements it by two before writing, so the stack grows downwards; it starts at the top of memory.
pc 16 bit
Program counter: the address of the next instruction to execute.
af' 16 bit
The alternate accumulator and flags, swapped in by ex af,af'. Traditionally reserved for interrupt handlers.
bc' 16 bit
The alternate bc, swapped in by exx together with de' and hl'.
de' 16 bit
The alternate de, swapped in by exx.
hl' 16 bit
The alternate hl, swapped in by exx.
i 8 bit
Interrupt vector register: the high byte of the vector table address in interrupt mode 2. Nothing raises interrupts in this emulator.
r 8 bit
Memory refresh register. The low 7 bits increment on every instruction fetch, which is why it is sometimes used as a cheap random number.
ixh 8 bit undocumented
The high half of ix.
ixl 8 bit undocumented
The low half of ix.
iyh 8 bit undocumented
The high half of iy.
iyl 8 bit undocumented
The low half of iy.
Flags
The flags live in the F register, which is only reachable as the high half of af. Every arithmetic and logic instruction updates some of them; the instruction pages list
which.
S bit 7
Sign: set when the result is negative (bit 7 of the result).
Z bit 6
Zero: set when the result is zero.
H bit 4
Half carry: carry from bit 3 to bit 4, used by daa for BCD arithmetic.
P/V bit 2
Parity/overflow: parity of the result for logical and rotate instructions (set when even), signed overflow for arithmetic instructions.
N bit 1
Add/subtract: set when the last operation was a subtraction, used by daa.
C bit 0
Carry: carry out of bit 7 (or 15), borrow for subtractions, and the bit shifted out by rotates and shifts.
Condition codes
Written after jp, call and ret to run them only when
the flags say so, as in jp nz, loop. jr understands only the first four.
Not zero: the Z flag is reset.
Zero: the Z flag is set.
No carry: the C flag is reset.
Carry: the C flag is set. Not to be confused with the c register.
Parity odd / no overflow: the P/V flag is reset.
Parity even / overflow: the P/V flag is set.
Plus: the S flag is reset, i.e. the result was not negative.
Minus: the S flag is set, i.e. the result was negative.
No overflow: a synonym of po, kept for other assemblers.
Overflow: a synonym of pe, kept for other assemblers.
Operand placeholders
The instruction tables write operands with these placeholders: ld (ix+dd), nn is written in a program as ld (ix+2), 42.
8 bit value: a number from 0 to 255 (or -128 to 127), a character constant, or a symbol.
16 bit value or address, from 0 to 65535. Labels are 16 bit values.
Signed 8 bit displacement, -128 to 127, added to ix or iy to form the address.
Target of a relative jump. Write a label or an address: the assembler computes the -128 to 127 displacement and reports an error when the target is out of reach.
The byte in memory at the address in hl. Usable wherever an 8 bit register is, at the cost of one extra memory access.
The byte in memory at ix plus the signed displacement, e.g. ld a,(ix+2). iy works the same way.
A condition code, tested against the flags by jp, call, ret and (for the first four only) jr.
Input/Output
A Z80 has no system calls. Programs reach the outside world with in and out, which address one of 256 ports: out (n), a sends A to port n, in a, (n) reads a byte back. The (c) forms (out (c), r and in r, (c)) take the port number from C,
which lets a program compute it, and put B on the high byte of the address bus, which is how
a read carries a parameter: the key code, the mouse view, the byte of the clock, the length
of a wait.
The emulator connects the ports below to the terminal, the screen, the keyboard, the mouse
and the clock. Every other port behaves like an empty bus: writes are dropped and reads
answer 0xFF. Reading a connected port with nothing to read pauses the program
until there is something, so in never fails, it only waits.
Console 0x00 - 0x04
The Terminal: one port per output format, and the input reads that pause the program until a line (or a keystroke on the Screen) is available. What is printed here is also drawn at the Screen’s text cursor, in 8 by 8 cells.
0x00 Character
Prints the byte as a character (Latin-1) and draws it at the Screen’s text cursor. 0x0A prints a newline.
Returns the next character of the input line, pausing for input when the line has been consumed. The line ends with a newline character (0x0A). Once the program has touched a Screen, Keyboard or Mouse port the characters come from the focused Screen instead, one keystroke at a time, and are echoed at the text cursor.
.org 0x8000
ld hl, msg
loop: ld a, (hl)
or a
jr z, done
out (0), a
inc hl
jr loop
done: halt
msg: .asciz "Hello!", 10 ; 10 is the newline: strings keep \n literally
0x01 Unsigned number
Prints the byte as an unsigned decimal number, 0 to 255.
Reads a line, parses it as a decimal number and returns its low byte. Stops the program with an error when the line is not a number.
.org 0x8000
in a, (1) ; ask for a number
add a, a ; double it
out (1), a ; print it
halt
0x02 Signed number
Prints the byte as a signed decimal number, -128 to 127.
Same as the unsigned number port.
.org 0x8000
ld a, 5
sub 10
out (2), a
halt
0x03 Hexadecimal
Prints the byte as two upper case hexadecimal digits.
Reads a line, parses it as a hexadecimal number (0x, $ prefix or h suffix accepted) and returns its low byte.
.org 0x8000
ld a, 255
out (3), a
halt
0x04 16 bit number
Prints the 16 bit number made of the high byte of the port address (register B when using out (c),r) and the byte written, as an unsigned decimal number.
Same as the unsigned number port.
.org 0x8000
ld hl, 1000
ld b, h ; high byte goes on the address bus
ld c, 4 ; port number
out (c), l ; prints HL
halt
Screen 0x10 - 0x1A
Drawing. Set the colors and the coordinates, then write one command to the command port; every coordinate is a byte, so the Screen is at most 256 by 256 pixels and is 256 by 192 until the program resizes it. Colors are one 3-3-2 byte.
Commands
Written to the command port, 0x17. One write runs one operation
on the coordinates and colors already set.
One pixel at (X, Y) in the pen color. The pen width does not apply.
A line from (X, Y) to (X2, Y2) in the pen color, leaving the drawing position at (X2, Y2).
A line from the drawing position to (X, Y), which becomes the new position: a polyline costs one command per point.
Moves the drawing position to (X, Y) without drawing.
A rectangle from (X, Y) to (X2, Y2), filled with the fill color and outlined with the pen. The right and bottom edges are excluded, as they are in EASy68K.
The same rectangle, outline only.
The ellipse inscribed in that rectangle, filled and outlined like it.
The same ellipse, outline only.
Spreads the fill color from (X, Y) over every pixel of the color that was there, four ways.
Fills the whole Screen with the fill color, homes the text cursor, and adopts that color as the background, so scrolled text rows and a later resize match what is on screen.
Resizes the Screen to X by Y pixels and clears it; a coordinate of 0 means 256, the largest size a byte cannot hold.
Double buffering on: drawing goes to an off-screen copy of the visible image until PRESENT, so an animation never shows a half-drawn frame.
Double buffering off: drawing appears immediately. The off-screen image is dropped without being shown.
Shows the off-screen image. With double buffering off it only asks for a repaint.
Colors
A color is one byte: three bits of red in bits 7-5, three of green in bits
4-2 and two of blue in bits 1-0. Each field is stretched over the screen's
eight bits by repeating it, so 0xFF is white and 0xE0 pure red.
0x00 black0x03 blue0x1C green0x1F cyan0xE0 red0xE3 magenta0xFC yellow0xFF white0xF0 orange0x92 gray0x49 dark gray0x10 Pen color
Sets the color of pixels, lines, outlines and text, as one 3-3-2 byte (RRRGGGBB).
The current pen color, back in 3-3-2.
.org 0x8000
ld a, 0xE0 ; 111 000 00: pure red
out (0x10), a ; pen color
ld a, 100
out (0x13), a ; X
ld a, 50
out (0x14), a ; Y
xor a ; command 0: pixel
out (0x17), a
halt
0x11 Fill color
Sets the color the inside of a filled shape, a flood fill and a clear use, as one 3-3-2 byte.
The current fill color, back in 3-3-2.
.org 0x8000
ld a, 0x1C ; 000 111 00: pure green
out (0x11), a ; fill color
ld a, 0xFF
out (0x10), a ; white pen for the outline
ld a, 20
out (0x13), a
out (0x14), a ; from (20, 20)
ld a, 80
out (0x15), a
out (0x16), a ; to (80, 80), right and bottom excluded
ld a, 4 ; command 4: filled rectangle
out (0x17), a
halt
0x12 Pen width
Sets how many pixels wide lines and outlines are, at least 1. A width of 0 is read as 1.
The current pen width.
.org 0x8000
ld a, 5
out (0x12), a ; five pixels wide
ld a, 10
out (0x13), a
out (0x14), a ; from (10, 10)
ld a, 200
out (0x15), a
ld a, 150
out (0x16), a ; to (200, 150)
ld a, 1 ; command 1: line
out (0x17), a
halt
0x13 X
The first X coordinate: the pixel, the start of a line, the left edge of a shape, the width of a resize.
The byte last written.
.org 0x8000
ld a, 128
out (0x13), a
ld a, 96
out (0x14), a ; (128, 96), the middle of the default Screen
ld a, 3 ; command 3: move to
out (0x17), a
ld a, 200
out (0x13), a
ld a, 20
out (0x14), a
ld a, 2 ; command 2: line to
out (0x17), a
halt
0x14 Y
The first Y coordinate, the companion of the X port, and the height of a resize.
The byte last written.
0x15 X2
The second X coordinate: the end of a line, the right edge of a shape. Unused by the one-point commands.
The byte last written.
0x16 Y2
The second Y coordinate, the companion of the X2 port.
The byte last written.
0x17 Command
Runs one drawing operation on the coordinates, colors and pen width already set. The commands are listed above.
The number of the last command run, 0 before the first one.
.org 0x8000
ld a, 0x03 ; 000 000 11: pure blue
out (0x11), a ; fill color
ld a, 9 ; command 9: clear to the fill color
out (0x17), a
ld a, 0xFC ; 111 111 00: yellow
out (0x11), a
ld a, 60
out (0x13), a
ld a, 40
out (0x14), a
ld a, 196
out (0x15), a
ld a, 152
out (0x16), a
ld a, 6 ; command 6: filled ellipse
out (0x17), a
halt
0x18 Pixel color
Ignored: the pixel is drawn with command 0, in the pen color.
The color of the pixel at (X, Y) as a 3-3-2 byte, read from the image being drawn on — the off-screen one while double buffering. Outside the Screen it reads as the background color.
.org 0x8000
ld a, 0xE0
out (0x10), a ; red pen
ld a, 8
out (0x13), a
out (0x14), a ; (8, 8)
xor a ; command 0: pixel
out (0x17), a
in a, (0x18) ; read the color back
out (3), a ; print it as hexadecimal
halt
0x19 Text cursor column
Moves the text cursor to a column, in 8 by 8 character cells: 0 to 31 on the default Screen. Out of range values are clamped.
The column the text cursor is on.
.org 0x8000
ld a, 12
out (0x19), a ; column 12
ld a, 8
out (0x1A), a ; row 8
ld hl, msg
loop: ld a, (hl)
or a
jr z, done
out (0), a ; the character port draws at the cursor
inc hl
jr loop
done: halt
msg: .asciz "HELLO"
0x1A Text cursor row
Moves the text cursor to a row, in 8 by 8 character cells: 0 to 23 on the default Screen. Out of range values are clamped.
The row the text cursor is on. Text scrolls the whole Screen up one cell row at the bottom, graphics included.
Keyboard 0x20 - 0x23
Input from the focused Screen, polled: whether a typed character is waiting (read it from the character port), whether a given key is held, and the last key pressed and released. Key codes are EASy68K’s, the same table every environment here uses: letters and digits are the ASCII code of their capital, 0x25 to 0x28 are the arrows left, up, right and down, 0x20 is the space bar and 0x0D is Enter.
0x20 Typed input available
Ignored.
1 when a character typed on the focused Screen is waiting to be read from the character port, else 0. During a testcase it answers for the scripted input instead, so a program that polls before reading works in both.
.org 0x8000
wait: in a, (0x20) ; anything typed?
or a
jr z, wait ; poll until there is
in a, (0x00) ; take the character
out (0x00), a ; print it
halt
0x21 Key state
Ignored.
1 while the key whose code is in B is held down, else 0. This is how a game reads WASD or the arrows: it never consumes anything, and a key held over several reads answers 1 every time.
.org 0x8000
ld c, 0x21 ; the key state port
ld b, 0x27 ; the right arrow
wait: in a, (c)
or a
jr z, wait ; poll until it is held
ld a, 'R'
out (0), a
halt
0x22 Last key pressed
Ignored.
The code of the last key pressed on the Screen, 0 before the first press. It persists, so a program that polls slowly still sees the key.
.org 0x8000
loop: in a, (0x22) ; the last key pressed
or a
jr z, loop
out (3), a ; print its code in hexadecimal
halt
0x23 Last key released
Ignored.
The code of the last key released, 0 before the first release. With the last-pressed port it is the pair EASy68K’s task 19 answers with.
Mouse 0x30 - 0x33
Pointing input over the Screen, polled, in the same logical pixels drawing uses. B selects which of the three views a read answers with: the current state, the state at the last button release, or the state at the last button press.
Views
Put one of these in B before reading a mouse port.
0x30 Mouse X
Ignored.
The X of the view selected by B (0 current, 1 last release, 2 last press), in logical Screen pixels from the left edge, independently of how the panel is zoomed.
.org 0x8000
ld c, 0x32 ; the buttons port
ld b, 0 ; view 0: the current state
wait: in a, (c)
and 1 ; the left button
jr z, wait
ld c, 0x30
in a, (c) ; X
out (1), a
ld a, ','
out (0), a
ld c, 0x31
in a, (c) ; Y
out (1), a
halt
0x31 Mouse Y
Ignored.
The Y of the view selected by B, in logical Screen pixels from the top edge.
0x32 Mouse buttons
Ignored.
The buttons and modifiers of the view selected by B: bit 0 left, bit 1 right, bit 2 middle, bit 3 the double-click flag (only in the last-press view), bit 4 Shift, bit 5 Alt, bit 6 Ctrl.
0x33 Mouse event count
Ignored.
For the current view, how many mouse events have happened, as a byte that wraps around; for the two snapshot views, the count at the moment of the snapshot, 0 when it has not happened yet. Comparing it with the previous read is how a program tells a new click from the one it already handled.
Program time 0x40 - 0x42
Waiting and elapsed time. A wait and a frame sync are reads that suspend the program without blocking the editor: the machine re-executes the in when the time has passed, so Stop still answers and the Screen still repaints. Testcases run on a virtual clock, where waits complete at once and time starts at zero.
0x40 Wait
Ignored.
Waits B hundredths of a second, then answers 0. The editor stays responsive and Stop still works: the machine simply re-executes the in when the time is up. In a testcase the wait completes at once.
.org 0x8000
ld c, 0x40
ld b, 25 ; a quarter of a second
in a, (c)
ld a, '!'
out (0), a
halt
0x41 Frame sync
Ignored.
Waits for the next animation frame, then answers 0. One read per frame is how an animation runs at the display’s own pace instead of as fast as the host can go; with double buffering, present the frame first and sync afterwards.
.org 0x8000
ld b, 10 ; ten frames
loop: push bc
in a, (0x41) ; wait for the next frame
ld a, '.'
out (0), a
pop bc
djnz loop
halt
0x42 Elapsed time
Ignored.
One byte of the number of hundredths of a second since the run started, selected by B: 0 the lowest byte, 3 the highest. A testcase reads a virtual clock that starts at zero and only moves when the program waits, so a test is reproducible.
.org 0x8000
ld c, 0x40
ld b, 10 ; wait a tenth of a second
in a, (c)
ld c, 0x42
ld b, 0 ; the lowest byte of the elapsed hundredths
in a, (c)
out (1), a
halt