ll
Load linked
Loads a 32-bit word into $t1 like lw; paired with sc, it forms an atomic read-modify-write on multiprocessor hardware.
Forms
ll , ()
Pseudo-instructions
The assembler turns these into one or more real instructions.
Paired with Store Conditional (sc) to perform atomic read-modify-write. Treated as equivalent to Load Word (lw) because MARS does not simulate multiple processors.
Operands
$t1- Any general-purpose register,
$0to$31, using its numeric or named spelling, such as$8or$t0($zerois$0;$rais$31). imm16- A signed 16-bit immediate,
-32768to32767. $t2- A general-purpose register. It may be the same register as
$t1. imm- An immediate value: a signed 16-bit value (
-32768to32767), an unsigned 16-bit value (0to65535) or a 32-bit value (-2147483648to4294967295). The assembler chooses a supported encoding for the value and other operands; a pseudoinstruction may expand into several instructions. label- A named address in the program, such as the start of a loop or a variable in
.data. imm32- A 32-bit immediate,
-2147483648to4294967295. Pseudoinstruction expansion may overwrite$at, losing its previous value.
In real multi-processor hardware, 'll' is the first half of an atomic read-modify-write pair with 'sc' (store conditional), allowing lock-free synchronization.
.data
.align 2
data: .word 0x12345678, 0
.text
# Load initialized bytes; inspect $t0: 0x12345678.
la $t1, data
ll $t0, 0($t1)